EDIF format is now used for AMD's Series-7 FPGA targets

Starting from November 1^st 2023, all IP cores for AMD's series-7 FPGAs (Artix-7, Kintex-7, Virtex-7 and Zynq-7000) are given in EDIF format. This applies to demo bundles as well as IP cores that are generated on the IP Core Factory.

In the past, the NGC format was used for the IP core's netlist on these FPGA targets. EDIF has been used for later FPGA targets from the beginning.

There is no functional difference between IP cores in NGC format and those in EDIF format. NGC and EDIF are just two different formats for representing netlists.

This transition requires no intervention from the user. In particular, if a custom IP core in EDIF format replaces an existing IP core in NGC format, nothing special needs to be done, except for deleting the old NGC file, and putting the EDIF file in its place. Vivado is indifferent to which format is used.

There is no need to make any change in the Vivado project's settings: The IP core's file name is not listed explicitly in the project's attributes. Rather, the core/ directory is designated to contain netlist files. Accordingly, Vivado looks for either e.g. xillybus_core.ngc or xillybus_core.edf in this directory.

The support for ISE has been phased out along with this transition.

The move to EDIF netlists follows complaints from users that have failed to synthesize the Xillybus project on Vivado running on specific versions of Windows. On these platforms, the synthesis was stuck indefinitely with the following message:

INFO: [Project 1-571] Translating synthesized netlist

Vivado was hence unable to convert the NGC file to EDIF on these platforms, as required to integrate the IP core into the project. Apparently, the runtime libraries that are required to run ngc2edif.exe were missing on these machines.

Users who wish to replace a custom IP core in NGC format with an EDIF may replicate the IP core in the IP Core Factory, and download the updated core: Use the "replicate" link in the "Core Summary" section on the page that details the IP core's device files. The replicated IP core is functionally identical to the original one.