Download the demo bundle

IMPORTANT: The Xillybus IP core in the demo bundle is configured for simplicity rather than performance. Significantly better results can be achieved for applications requiring a sustained and continuous data flow, in particular for high-bandwidth cases. It's therefore recommended to build your own custom IP core after finishing the flow with the demo bundle.

You need to download two items, one from each of the two bundle groups below (or the FPGA bundle only, if certain Linux distributions are chosen). Please refer to the "getting started" guides in the documentation page afterwards.

The FPGA bundle:

The following table lists the boards for which an out-of-the box demo bundle is available.

VendorDevice FamilyPCIe
Lanes
Maximal
data rate(**)
Targeted Board 
Xilinx
(AMD)
Virtex-51x~ 200 MB/sML506Click to download
Spartan-61x~ 200 MB/sSP605Click to download
Virtex-64x~ 400 MB/sML605Click to download
Kintex-78x~ 800 MB/s - 3.5 GB/s(***)KC705Click to download
Virtex-7 w/ Gen2(*)8x~ 800 MB/s - 3.5 GB/s(***)VC707Click to download
Virtex-7 w/ Gen3(*)8x~ 800 MB/s - 6.6 GB/s(***)VC709Click to download
Artix-74x~ 400 MB/s - 1.6 GB/s(***)AC701Click to download
Kintex Ultrascale8x~ 800 MB/s - 6.6 GB/s(***)KCU105Click to download
8x~ 800 MB/s - 6.6 GB/s(***)KCU1500Available upon request
Virtex Ultrascale8x~ 800 MB/s - 6.6 GB/s(***)VCU108Click to download
Kintex Ultrascale+8x~ 1600 MB/s - 6.6 GB/s(***)KCU116Click to download
Virtex Ultrascale+8x~ 1600 MB/s - 6.6 GB/s(***)VCU118Click to download
Versal ACAP8x~ 6.6 GB/s(***)VMK180 and VCK190Available upon request
Zynq-7000 (PCIe)4x~ 800 MB/s - 1.6 GB/s(***)ZC706Available upon request
Zynq UltraScale+ (PCIe)4x~ 1600 MB/s - 3.5 GB/s(***)ZCU106Click to download
Zynq-7000 (PL/PS interface)N/A~ 300 MB/s

Z-Turn Lite, Zedboard,
ZyBo and MicroZed

Please refer to Xillinux' page

Intel

(Altera)

Cyclone IV1x~ 200 MB/sCyclone IV Transceiver starter kitClick to download
4x~ 400 MB/sCyclone IV GX FPGA development kitClick to download
Stratix IV4x~ 400 MB/sTerasic DE4Click to download
4x~ 400 MB/sStratix IV GX FPGA Development KitClick to download
Arria II4x~ 400 MB/sArria II GX FPGA Development KitClick to download
Cyclone V4x~ 400 MB/s - 1.6 GB/s(***)Cyclone V GT FPGA Development KitClick to download
Arria V4x~ 400 MB/s - 1.6 GB/s(***)Arria V GX FPGA Development kitClick to download
4x~ 400 MB/s - 1.6 GB/s(***)Arria V GX FPGA Starter KitClick to download
Stratix V4x~ 800 MB/s - 3.5 GB/s(***)Stratix V GX FPGA Development KitClick to download
4x~ 800 MB/s - 3.5 GB/s(***)Stratix V DSP Development KitClick to download
Arria 108x~ 800 MB/s - 3.5 GB/s(***)Arria 10 GX FPGA Development KitClick to download
Cyclone 104x~ 800 MB/s - 1.6 GB/s(***)Cyclone 10 GX FPGA Development KitClick to download
Stratix 1016x~ 6.6 GB/s(***)Stratix 10 GX FPGA Development KitAvailable upon request
Cyclone V SoCN/A~ 200 MB/sSoCKit boardPlease refer to Xillinux' page

(*) For Virtex-7 XT and HT (except 7VX485T), pick the bundle for Gen3. For all other Virtex-7 FPGA, the Gen2 bundle.
(**) Please refer to this page for best practices on achieving the desired bandwidth. For information about the bandwidth limits, please refer to this page. There's also a page about latency.
(***) Revision B/XL/XXL cores with data rates up to 6.6 GB/s are available for selected devices upon request. Click here to read more.

Code bundle for the host:

Xillybus works out of the box with most Linux distribtions. Also, Xillybus' driver is included in Linux kernel sources from 3.12.0 and later, and is typically enabled and ready for use in precompiled kernels and module sets.

  • Click here to download the driver for Windows 7 and later (32/64 bit).
  • Click here to download the Linux driver, udev file and a sample C applications.

Additional downloads: