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1 Introduction

1.1 General

Xillybus is a multi-purpose platform for a variety of applications. Accordingly, each user can easily create and download a custom IP core that meets specific requirements: The number of streams, their direction, attributes related to their performance and consumption of resources.

To simplify the definition and creation of custom IP cores, an online tool is available: The IP Core Factory (https://xillybus.com/custom-ip-factory).

This tool consists of a simple web application, which allows the user to define the requested device files and their configuration. Once the definition is complete, an automatic process generates the files for inclusion in the FPGA project. The custom IP core is ready for download as a zip file after a short while (typically a few minutes).

The custom IP core that is downloaded is fully functional. There is no technical limitation to testing and using this IP core in a real-life application.

The web application may be used without reading this guide, but it’s recommended to first familiarize yourself with Xillybus by running the demo bundle. Users who wish to get a better understanding and control of the device files’ attributes, will find some background information in this guide.

Note that this guide does not cover the Xillyp2p IP core, although the IP Core Factory can generate it as well. For more information about Xillyp2p, please refer to https://xillybus.com/xillyp2p/.

For users who have not yet familiarized themselves with the demo bundle, some of the following documents are recommended for prior reading:

Even when the need for a custom IP core is clear, it’s best to start off with the demo bundle. This clarifies how the IP core is integrated with the application logic, and how the entire project should be set up.

All information about the IP core’s custom configuration is stored within the IP core itself in the FPGA. The driver at the host retrieves this information when the driver initializes. Hence there is no need to change anything on the host when the IP core is replaced.

A common mistake is trying to minimize the number of streams configured, for the sake of saving resources. Sections 3 and 4.4 show how a Xillybus IP core scales, and explains why it makes sense allocating streams generously.

1.2 How to integrate the custom IP core

After downloading the custom IP core from the IP Core Factory, the demo bundle needs to be modified to include this IP core. This requires a few simple steps. The instructions are written in README.TXT, which is part of the IP Core’s zip file. These instructions are also listed below for convenience.

This README file also contains other useful information:

  • The Core ID, which is a five digit number. This number is a unique identifier for the IP core. The Core ID should be mentioned when requesting a pricing quote.

  • The IP core’s devices files are listed. The technical details about each device file is also shown. This is the accurate information about the IP core’s real characteristics.

In order to integrate the custom IP core into the demo bundle, follow these steps:

  1. Replace two files in the demo bundle with the files in the IP Core’s zip: xillybus.v and xillybus_core.v (or xillybus_xl_core.v / xillybus_xxl_core.v).

  2. Replace the IP core itself. This file is in the demo bundle’s subdirectory with the name “core/”. The file to replace is something like xillybus_core.ngc, xillybus_core.edf, xillybus_core.qxp or xillybus_core.vqm.

  3. Edit xillydemo.v (or xillydemo.vhd) in order to integrate the desired application with this custom IP core. For guidance, look in the directory named “instantiation templates”, which is part of the IP core’s zip file. The file named template.v (or template.vhd) contains the instantiation template that should be followed.