7 Hibernation
“Hibernation”, “standby” and “sleep” are common names for a computer’s power saving state. Upon hibernation, the computer saves the contents of its RAM to a hard disk, and effectively powers down. When commanded to power up again, it quickly resumes to apparently the same state as it was upon entering hibernation.
With an FPGA-based peripheral, hibernation requires extra caution, because the device driver doesn’t know what the FPGA is about to go through, in particular whether it’s going to remain powered on.
For this reason, a XillyUSB device (i.e. a Xillybus IP core connected through a USB cable) is effectively disconnected before the computer goes into sleep, as if it was unplugged physically. If the device is present when the computer wakes up again, it’s treated as if it was just connected to the computer. A hibernation is hence fine if the application tolerates this behavior. Note that if multiple XillyUSB devices are connected to the host, the indexes appearing in their file names may change after waking up.
The rest of this section discusses Xillybus over PCIe.
If the device is powered from an external source, it will stay powered on while the rest of the computer goes down. But it’s not clear if the PCIe bus itself will remain powered on, or if it will be reset at some stage.
If it takes its power source from the computer’s supply, it will most likely lose power. In that case, the FPGA may reload its bitstream from the flash memory when power returns, and continue being a PCIe card on the bus, or it can disappear completely from the bus if it depends on manually loading the bitstream.
Note that Windows can fail to wake up from hibernation if a PCIe interface suddenly goes away while the computer was down. So if the FPGA depends on the computer’s power source, it should definitely reload the bitstream automatically when powered on.
The Xillybus device driver copes with this uncertainty by acting as if the driver is about to be unloaded completely, when the operating system informs it that the computer is about to invoke hibernation: It generates an error on all pending I/O requests, forces all open files to close immediately, frees all resources, removes the device files and brings the Xillybus IP core in the FPGA to a quiescent state.
When the computer resumes from hibernation, the driver initializes as during boot.
Despite the proven reliability of this process, there are two possible problems:
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The driver may not be able to allocate enough RAM for its buffers, in particular if the overall buffer size exceeds several megabytes. Large chunks of contiguous memory in physical mapping are by far easier to allocate when the driver is loaded at the computer’s boot, than after the computer has been running for a while. The operating system’s memory map is retained after hibernation, so the fragmentation of the memory remains as well. Hence the chunks of contiguous physical memory that were freed before hibernation, may not be contiguous anymore when the driver is loaded again, during the system’s wakeup.
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Even though user space applications should be ready to handle errors from any I/O function call, an unexpected error resulting from hibernation may expose a rare hidden bug.
The overall conclusion is that the best way to handle hibernation is to avoid it on a computer with an FPGA-based peripheral attached to the PCIe bus. This is easily done by setting the computer’s power saving attributes, in particular turning off automatic hibernation resulting from what the operating system may consider as being idle. This will also prevent the computer from going to sleep due to lack of human interaction, while it was in fact in the middle of an important unattended task.